![]() It is very common to share the same transmission line to transfer different types of data, or even to transfer power. The application we are going to design is a decoder. Finally, we will verify the behavior with the Zmod AWG 1411 and the tool FPGA Data Capture. Then we will add the HDL code of the filter to our Vivado design and test the integration of the filter with the rest of the design. This will give us information of the behavior of the filter in the real application. While we still use our demo signal, the filter will run on an FPGA-in-the-Loop. Next, we will generate the HDL code of the filter designed, and we will test this HDL code on the Eclypse Z7 board. Then we can simulate the quantized filter with a demo signal in Simulink. At this point, we have to verify if the quantized model meets the defined criteria. That filter will be quantified according to the capabilities of our Zmod Scope 1410 board, which we will use to acquire our signal. In this project, we are going to design a filter with the help of the Filter Designer tool. The package Signal processing Toolbox will give us all the functions that we will need to design a filter or any signal processing system, Fixed-Point Designer allow us to quantize the data in our application and to verify the response on a digital system, and packages like HDL Coder and HDL Verifier will allow us to test our design using a real FPGA, and implement the system on our FPGA board. I don’t know if there is any field in engineering which does not have a package in MATLAB, and digital signal processing and FPGA design are certainly not among them. If I say “software for engineering”, most of you probably think of MATLAB.
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